Near-Threshold Computing of Single-Rail MOS Current Mode Logic Standard Cells Based on OR Logic Structure

摘要

In this paper, a high-speed and low-power Single-Rail MOS Current Mode Logic (SRMCML) standard cell library based on near-threshold computing was implemented with SMIC 130 nm process. In the standard cell library, logic cells were realized based on OR logic, so that low power of the circuits can be obtained in near-threshold regions. The array and tree multipliers based on OR logic were used to verify the effectives of the proposed methods. The simulation results shown that the 4×4 array multiplier based on SRMCML OR logic standard cell library obtained the power savings of 70.20% and delay reduction of 71.32% compared with the traditional CMOS implementations at the operating frequency of 1.6 GHz with the supply voltage of 0.7 V. The simulation results also shown that the tree multiplier based on SRMCML OR logic standard cell library obtained the power savings of 70.07% and delay reduction of 72.02% compared with the traditional CMOS implementations at the operating frequency of 1.6 GHz with the supply voltage of 0.7 V.