An Interpolator for Signal Peak Detection in Front-end Electronics

摘要

The interpolator is designed to determine the maximum signal amplitude in the analog channel of a readout ASIC. The use of an interpolator allows to mitigate the requirements for the sampling frequency of an analog-to-digital converter built into the channel of the readout ASIC. Design process and test results of an interpolator unit implemented by means of a FPGA are described.