Design and implementation of higher order sigma delta modulator circuits using FPAA

摘要

In this paper, the prototyping of 3rd order, 4th order, 5th order, and 6th order sigma-delta analog to digital converters (sigma increment ADCs) has been presented. It summarily portrays the method implemented for configuration and reconfiguration of the proposed circuits by using Field Programmable Analog Array (FPAA). Their function was determined in the time domain at a constant 1 V supply voltages which is a sinewave input signal of 20 kHz frequency. The sampling frequency is fs = 4 MHz and the Oversampling ratio is OSR = 50 which yields a bandwidth of 40 kHz. Practical experimentation of the circuits was carried out using the AN221E04 FPAA device from Anadigm. Circuit realization of 3rd order, 4th order, 5th order, and 6th order sigma-delta analog to digital converters (sigma increment ADCs) using FPAA are shown in figures. Also, sinusoidal input and output waveforms of implemented architectures are shown. A comparison of the proposed designed circuits with the various sigma-delta modulators published in the previous paper is also shown. The proposed sigma-delta modulators can be applied in the investigation and practical study of designing programmable analog devices and systems based on FPAA.