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Digital extraction of quantization error and its applications to successful design of sigma-delta modulator

机译:量化误差的数字提取及其应用于Sigma-Delta调制器的成功设计

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AbstractA new technique to evaluate the quantization error of cascaded sigma-delta modulators in digital domain is presented. It avoids the complications associated with analog extraction of the quantization error in multistage noise shaping (MASH) modulators before feeding the error to the proceeding stage. Instead, the quantization error is estimated and cancelled out by adding a digital subtractor and by injecting a purely analog signal from the preceding stage to the next stage. In comparison to conventional MASH modulator structure, analog circuit requirements of the modulator are therefore relaxed, and the number of switched-capacitor digital-to-analog converters and the associated switching energy are lowered. In the absence of extra switching blocks, less flicker and thermal noise would be also injected into the circuit. Different implementations of MASH modulator are presented and analyzed based on the proposed digital quantization error extraction technique. Behavioral-level simulation results prove the mathematical equivalence of the proposed structures with successful MASH designs found in the literature, and confirm the effectiveness of the idea. For a ??1.4?dB, 19.8?kHz input and an oversampling ratio of 16, a modified 1-V 20-MS/s 2?+?2 MASH modulator achieves a signal-to-noise-and-distortion ratio (SNDR) of 78?dB, when the input of the first quantizer is fed to the second stage. The second design based on digital extraction of quantization error achieves a 71?dB SNDR for a ??8.0?dB, 19.8?kHz input, when the second stage is fed by the output of the first integrator.]]>
机译:<![cdata [ <标题>抽象 ara id =“par2”>评估级联sigma的量化错误的新技术呈现了数字域中的Δ调制器。它避免了与多级噪声整形(MASH)调制器中的量化误差中的量化误差的模拟提取相关的并发症,然后在送到误差阶段之前。相反,通过添加数字减法器并通过从前一级向下一阶段注入纯粹的模拟信号来估计和消除量化误差。与传统的混浆调制器结构相比,因此放宽调制器的模拟电路要求,并且降低了开关电容数字到模拟转换器的数量和相关的切换能量。在没有额外的切换块的情况下,也将注入较少的闪烁和热噪声进入电路。基于所提出的数字量化误差提取技术,提出和分析了混合调制器的不同实现。行为级仿真结果证明了在文献中发现的成功捣碎设计的拟议结构的数学等效性,并确认了该想法的有效性。对于一个?? 1.4?DB,19.8?KHz输入和过采样比为16,修改的1-V 20-MS / S 2?+α2醪调制器实现了信号 - 噪声和失真率(SNDR )在78?dB中,当第一量子化器的输入馈送到第二阶段时。基于量化误差的数字提取的第二种设计实现了一个71?DB SNDR的a ?? 80?DB,19.8?KHz输入,当第二阶段被第一积分器的输出供给时。 ]]]>

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