EKV3 compact modeling of MOS transistors from a 0.18 mu m CMOS technology for mixed analog-digital circuit design at low temperature

摘要

The standard version of the EKV3 compact model is evaluated for simulation of mixed analog-digital circuits working at low temperature (77-200 K). This evaluation is performed on a dual gate oxide CMOS technology with 0.18 mu m/1.8 V and 0.35 mu m/3.3 V MOSFET transistors. A detailed temperature analysis of some physical effects is performed. Specific effects, such as anomalous narrow channel effect, freeze-out in Lightly Doped drain (LDD) regions or quantization of the inversion charge, are observed at low or intermediate temperature. Some improvements of this compact model will allow a more accurate description of MOS transistors at low temperature.