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Low-complexity implementation of efficient reconfigurable structure for cost-effective hearing aids using fractional interpolation

机译:低复杂性实现有效的可重构结构,用于使用分数插值的经济高效的助听器

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摘要

Digital hearing aids can be made less expensive if they are reconfigurable and of low hardware complexity. Hence, this work proposes a hardware-efficient, reconfigurable filter bank structure, based on fractional interpolation. The proposed structure is reconfigurable since a single structure can be used for different patients with different types of hearing impairments. The proposed structure consists of a masking stage and a scheme generation stage with a prototype filter in each stage. The prototype filters are made multiplier-less by representing their coefficients in the CSD space. The filter characteristics are improved by deploying a MOABC optimization algorithm. The number of adders is reduced using the SIDC-CSE technique. The low-complexity structure can be used for all types of hearing impairments, with the matching error and delay within tolerable ranges. The proposed structure has been implemented on an FPGA to support the analytical results for low hardware complexity and hence low power. (C) 2019 Elsevier Ltd. All rights reserved.
机译:如果它们是可重新配置和低硬件复杂性,数字助听器可以更便宜。因此,这项工作提出了一种基于分数插值的硬件高效,可重构的滤波器组结构。所提出的结构是可重新配置的,因为单个结构可用于不同类型的听力障碍的不同患者。所提出的结构包括掩蔽阶段和方案生成阶段,每个阶段中具有原型滤波器。通过表示CSD空间中的系数,原型滤波器较少。通过部署Moabc优化算法来提高滤波器特性。使用SIDC-CSE技术减少了添加剂的数量。低复杂性结构可用于所有类型的听力障碍,匹配误差和可容忍范围内的延迟。所提出的结构已经在FPGA上实施,以支持低硬件复杂性的分析结果,因此低功耗。 (c)2019年elestvier有限公司保留所有权利。

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