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首页> 外文期刊>ACM Transactions on Design Automation of Electronic Systems >An Interactive Codesign Environment for Domain-Specific Coprocessors
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An Interactive Codesign Environment for Domain-Specific Coprocessors

机译:用于特定领域协处理器的交互式协同设计环境

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摘要

Energy-efficient embedded systems rely on domain-specific coprocessors for dedicated tasks such as baseband processing, video coding, or encryption. We present a language and design environment called GEZEL that can be used for the design, verification and implementation of such coprocessor-based systems. The GEZEL environment creates a platform simulator by combining a hardware simulation kernel with one or more instruction-set simulators. The hardware part of the platform is programmed in GEZEL, a deterministic, cycle-true and implementation-oriented hardware description language. GEZEL designs are scripted, allowing the hardware configuration of the platform simulator to be changed quickly without going through lengthy recompiles. For this reason, we call the environment interactive. We present the execution ladder as an optimization framework to balance interactivity against simulation speed. We demonstrate our approach using several designs including an AES encryption coprocessor and a Viterbi decoding coprocessor. We discuss the advantages of our approach as opposed to more conventional approaches using SystemC and Verilog/VHDL.
机译:节能嵌入式系统依靠特定于域的协处理器来完成诸如基带处理,视频编码或加密之类的专用任务。我们提供了一种称为GEZEL的语言和设计环境,可用于这种基于协处理器的系统的设计,验证和实现。 GEZEL环境通过将硬件仿真内核与一个或多个指令集仿真器相结合来创建平台仿真器。该平台的硬件部分使用GEZEL编程,GEZEL是一种确定性,周期真实且面向实现的硬件描述语言。 GEZEL设计采用脚本编写,可快速更改平台模拟器的硬件配置,而无需进行冗长的重新编译。因此,我们将环境称为交互式。我们提出执行阶梯作为优化框架,以平衡交互性和仿真速度。我们使用包括AES加密协处理器和Viterbi解码协处理器在内的几种设计来演示我们的方法。与使用SystemC和Verilog / VHDL的传统方法相比,我们讨论了这种方法的优势。

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