首页> 外文期刊>Journal of nanoscience and nanotechnology >On-Chip Gate Electrostatic Discharge Protection Design for 900 V Power Metal Oxide Semiconductor Field Effect Transistor Using Punch-Through Diode Without Degrading Switching Loss
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On-Chip Gate Electrostatic Discharge Protection Design for 900 V Power Metal Oxide Semiconductor Field Effect Transistor Using Punch-Through Diode Without Degrading Switching Loss

机译:片上栅极静电放电保护设计900 V电力金属氧化物半导体场效应晶体管使用冲孔二极管,无降低开关损耗

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摘要

In order to protect the gate oxide from electrostatic discharge (ESD) in power MOSFET, the onchip ESD protection circuits are required. Zener diode on poly silicon gate was normally used in power device because Zener diode structure was easy to merge with conditions of vertical structure without adding electrode. However, merged Zener diode can make unnecessary gate capacitance, and then switching characteristics are degraded by added capacitance. In this paper, a stacked punch-through diode (PT diode) with lower capacitance than Zener diode was designed for 900 V power MOSFET. The PT diode was consisted on doped polysilicon gate between the gate pad and the source pad. The electrical characteristics of this device was designed and analyzed by TCAD simulation and experiments. On the basis of this analysis, the stacked PT diode for ESD protection was optimized and compared with conventional Zener diode.
机译:为了保护从功率MOSFET中的静电放电(ESD)的栅极氧化物,需要onchip ESD保护电路。 聚硅栅极上的齐纳二极管通常用于电力装置,因为齐纳二极管结构易于在不添加电极的情况下与垂直结构的条件合并。 然而,合并的齐纳二极管可以制造不必要的栅极电容,然后通过增加电容来降低切换特性。 本文设计了比齐纳二极管更低电容的堆叠冲击式二极管(PT二极管)被设计为900V功率MOSFET。 PT二极管由栅极焊盘和源垫之间的掺杂多晶硅栅极组成。 通过TCAD仿真和实验设计和分析了该装置的电气特性。 在该分析的基础上,优化了用于ESD保护的堆叠PT二极管并与传统的齐纳二极管进行比较。

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