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首页> 外文期刊>Journal of Electronic Materials >Verification of numerical models used in microelectronics packaging design by interferometric displacement measurement methods
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Verification of numerical models used in microelectronics packaging design by interferometric displacement measurement methods

机译:干涉位移测量方法验证微电子包装设计中使用的数值模型

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摘要

Verified/predictive modeling has become an integral part of electronic packaging product development in order to reduce costs and cycle time. In this paper, interferometric displacement measurement methods are utilized to verijy the validity ofnumerical models for microelectronics packaging design. Three optical methods with submicron sensitivities are employed: moire' interferometry, microscopic moire interferometry and Twyman/Green interferometry. The first two provide contour maps ofin-plane displacement fields, and the third maps out-of-plane displacement fields. Their high sensitivity and high spatial resolution make them ideally suited for verification of numerical models. By combining numerical modeling and experimentalverification until the results merge, numerical models become more accurate and dependable. Then, the models can be applied extensively to optimize the package designs with confidence that the models provide effective information on material and geometrysensitivity.
机译:经过验证/预测建模已成为电子包装产品开发的组成部分,以降低成本和循环时间。本文利用干涉式位移测量方法来验证微电子包装设计的数值模型的有效性。采用三种具有亚微米敏感性的光学方法:Moire'干涉测量,微观莫尔干涉测量和Twyman /绿色干涉测量。前两个提供了平面位移场的轮廓图,第三映射外平面位移场。它们的高灵敏度和高空间分辨率使它们非常适合验证数值模型。通过将数值建模和实验性结合在结果合并之前,数值模型变得更加准确和可靠。然后,模型可以广泛应用于利用型号提供有关材料和几何敏感度的有效信息的置信度,优化包装设计。

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