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Development of Low-power Low-noise CMOS LNA for 24-GHz Automotive Radar

机译:用于24 GHz汽车雷达低功耗低噪声CMOS LNA的开发

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This paper presents low-power low-noise 24-GHz CMOS LNA (low noise amplifier) for automotive collision avoidance radar. The proposed circuit is fabricated using 65 nm RF CMOS technology, and it is powered by 1.2 V supply. To increase voltage gain and decrease power consumption, this circuit has cascode scheme, and it is optimized to decrease noise figure. Cascode inductive source degeneration technique is also utilized to match the circuit to source impedance. The proposed LNA showed the lowest power consumption of 4.59 mW and the lowest noise figure of 2.98 dB with high voltage gain of 24.3 dB as compared to recently published results. It also showed the smallest chip area of 0.6x0.6 mm(2), and the size of the core cell of 0.31x0.35 mm(2) without pads as compared to recently reported results. We expect that the proposed LNA is suitable for GHz-band automotive collision avoidance radar.
机译:本文介绍了汽车碰撞雷达的低功耗低噪声24-GHz CMOS LNA(低噪声放大器)。 所提出的电路采用65nm射频CMOS技术制造,其供电1.2 V供电。 为了提高电压增益和降低功耗,该电路具有Cascode方案,并且优化以减少噪声系数。 共源共源共源共源型感应源退化技术与电路匹配到源阻抗。 与最近公布的结果相比,所提出的LNA显示出4.59兆瓦的最低功耗和2.98 dB的最低噪声系数为2.98 dB。 与最近报道的结果相比,它还显示了0.6×0.6mm(2)的最小芯片面积为0.6×0.6mm(2),而无需垫的核心单元的尺寸,而没有垫。 我们预计所提出的LNA适用于GHz波段汽车碰撞避免雷达。

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