【24h】

Macroscopic high density nanodisc arrays of zinc oxide fabricated by block copolymer self-assembly assisted nanoimprint lithography

机译:嵌段共聚物自组装辅助纳米压印光刻技术制备的氧化锌宏观高密度纳米圆盘阵列

获取原文
获取原文并翻译 | 示例
           

摘要

We report a facile means of creating nanodisc arrays of ZnO with high densities (~22 Gbit in~(-2)) and narrow distributions in size, shape and periodicities (<15%) using a combination of block copolymer self-assembly and nanoimprint lithography (NIL). ZnO nanodisc arrays with sub-100 nm spatial resolutions, using high-throughput and manufacturing compatible approaches are realized. The fabrication combines benefits from the use of NIL, which is a high-throughput and repeatable tool and from the use of block copolymer self-assembly which provides for low-cost production of high-resolution NIL molds. Preliminary results of the investigation of memory performance of these arrays within MOS capacitor devices show a flat-band voltage shift of 2.53 V at a relatively low operating voltage of 10 V. A high charge trap density of 2.3 × 10~(18) cm~(-3) combined with excellent retention of ~80% after 1000 s of discharging is observed with low tunnelling oxide thickness of 3 nm, demonstrate significant promise of the ZnO nanodiscs to act as charge storage centers in non-volatile flash memory devices.
机译:我们报告了结合嵌段共聚物自组装和纳米压印的一种简便的方法来创建具有高密度(〜22 Gbit in〜(-2))和尺寸,形状和周期性窄分布(<15%)的ZnO纳米盘阵列光刻(NIL)。使用高通量和制造兼容的方法,实现了具有低于100 nm空间分辨率的ZnO纳米光盘阵列。该制造结合了使用高通量和可重复使用的工具NIL以及使用嵌段共聚物自组装(可提供低成本生产高分辨率NIL模具)的好处。对MOS电容器器件中这些阵列的存储性能进行研究的初步结果显示,在10V的较低工作电压下,平带电压漂移为2.53V。2.3×10〜(18)cm〜的高电荷陷阱密度(-3)在3纳米的低隧穿氧化物厚度下观察到1000 s放电后约80%的出色保留率,证明ZnO纳米圆盘有望在非易失性闪存设备中充当电荷存储中心。

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号