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首页> 外文期刊>Surface & Coatings Technology >Optimized germanium co-implant with B_2H_6 PLAD for better advanced PMOS device performance
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Optimized germanium co-implant with B_2H_6 PLAD for better advanced PMOS device performance

机译:与B_2H_6 PLAD优化的锗共植入物,可提供更好的先进PMOS器件性能

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摘要

This work demonstrates that the sequence of a Ge co-implant with a B_2H_6 PLAD in the source/drain is very critical in order to improve advanced PMOS performance. Locating the Ge co-implant after the B_2H_6 PLAD resulted in higher total retained B dose and less implant damage. PMOS performance was significantly improved compared to B_2H_6 PLAD without the Ge co-implant or Ge co-implant before B_2H_6 PLAD. The Ge implant energy was optimized to locate the Ge peak around the B deposition layer/Si substrate interface for a better knocking effect and less implant damage. With the optimized Ge implant conditions the source/drain contact resistance and sheet resistance were significantly reduced, while the junction leakage current was not degraded. As a result, PMOS I_(ds) improved by 12%, transconductance KL improved by 14%, and IOFF variation improved by 33% without significant change in mean I_(OFF). This process helps overcome technical challenges of B_2H_6 PLAD, providing a path for continued scaling of PMOS junction depth with improved device performance.
机译:这项工作表明,在源极/漏极中掺有B_2H_6 PLAD的Ge共注入的顺序对于提高先进的PMOS性能至关重要。在B_2H_6 PLAD之后定位Ge共植入物会导致更高的总保留B剂量和更少的植入物损伤。与没有Ge共注入或在B_2H_6 PLAD之前加入Ge共注入的B_2H_6 PLAD相比,PMOS性能得到了显着改善。优化了Ge注入能量,以将Ge峰定位在B沉积层/ Si衬底界面周围,从而获得更好的爆震效果和更少的注入损伤。通过优化的Ge注入条件,源极/漏极接触电阻和薄层电阻显着降低,而结漏电流却没有降低。结果,PMOS I_(ds)提高了12%,跨导KL提高了14%,IOFF变化提高了33%,而平均值I_(OFF)没有明显变化。此过程有助于克服B_2H_6 PLAD的技术难题,从而为改善PMOS结深度和改善器件性能提供了路径。

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