A Sorting-based Architecture of Finding the First Two Minimum Values

摘要

In this paper we propose a sorting-based architecture of finding the first two minimum values. Given a set of numbers X, efficient algorithm and its corresponding hardware implementation for finding the first minimum value, min_1st, second minimum value, min_2nd and the position of min_1st are greatly needed in the low-density parity-check (LDPC) decoder design. Compared to tree structure (TS) based approach, sorting based (XS) approach needs less number of comparisons. According to the synthesis result, the proposed architecture achieves a lower hardware cost, especially when the number of X is bigger than 16.