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Finite element simulation of dislocation generation in doped and undoped GaAs single crystals grown from the melt

机译:从熔体生长的掺杂和未掺杂GaAs单晶中位错生成的有限元模拟

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摘要

Dislocations in gallium arsenide (GaAs) single crystals are generated by excessive stresses that are induced during the crystal growth process, and the fabrication and packaging of microelectronic devices/circuits. The presence of dislocations has adverse effects on the performance, lifetime and reliability of the GaAs-based devices/circuits. It is well known that dislocation density can be significantly reduced by doping impurity atoms into the GaAs crystal and/or decreasing the thermal stresses in the crystal during its growth process. A transient finite element model is developed to simulate the dislocation generation in GaAs crystals grown from the melt. A viscoplastic constitutive equation that couples a microscopic dislocation density with a macroscopic plastic deformation is employed to formulate this transient finite element model, where the dislocation density is considered as an internal state variable and the doping impurity is represented by a drag-stress in this constitutive model. GaAs single crystals grown by the vertical gradient freeze process are adopted as an example to study the influences of doping impurity on dislocations generated in the grown crystal. The calculated results show that doping impurity can significantly reduce dislocation generation and produces low-dislocation GaAs crystals.
机译:砷化镓(GaAs)单晶中的位错是由晶体生长过程以及微电子器件/电路的制造和封装过程中产生的过大应力产生的。位错的存在对基于GaAs的器件/电路的性能,寿命和可靠性产生不利影响。众所周知,通过在GaAs晶体中掺杂杂质原子和/或降低晶体在生长过程中的热应力,可以显着降低位错密度。建立了瞬态有限元模型来模拟从熔体中生长的GaAs晶体中位错的产生。使用将微观位错密度与宏观塑性变形耦合的粘塑性本构方程来公式化此瞬态有限元模型,其中位错密度被视为内部状态变量,掺杂杂质由该本构中的拉应力表示模型。以通过垂直梯度冻结法生长的GaAs单晶为例,研究了掺杂杂质对生长晶体中产生的位错的影响。计算结果表明,掺杂杂质可以显着减少位错的产生并产生低位错的GaAs晶体。

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