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Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers

机译:面向使用多路复用器的可靠量子点元胞自动机逻辑电路的模块化设计

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With the rapid advancement in very large scale integration (VLSI) technology, it is the utmost necessity to achieve a reliable design with low power consumption. The Quantum dot Cellular Automata (QCA) can be such an architecture at nano-scale and thus emerges as a viable alternative for the current CMOS VLSI. This work targets design of logic module in QCA. It reports a modular design methodology to build the fault tolerant 2(n):1 multiplexer with optimized wire-crossings, delay and power consumption. A 2:1 QCA multiplexer is proposed as the basic logic module that in turn is utilized to synthesize 4:1 and 8:1 multiplexers. It shows significant achievement in terms of clock speed (36%), wire-crossing (58%), fault tolerance (77.62%) and power consumption over the existing designs. The effectiveness of proposed multiplexer is further established through synthesis of configurable logic block (CLB) for field programmable gate arrays (FPGAs). (C) 2015 Elsevier Ltd. All rights reserved.
机译:随着超大规模集成电路(VLSI)技术的飞速发展,实现低功耗的可靠设计是最必要的。量子点元胞自动机(QCA)可以是纳米级的这种架构,因此可以作为当前CMOS VLSI的可行替代方案。这项工作针对QCA中的逻辑模块设计。它报告了一种模块化设计方法,可构建具有优化的线穿越,延迟和功耗的容错2(n):1多路复用器。提出将2:1 QCA多路复用器作为基本逻辑模块,然后将其用于合成4:1和8:1多路复用器。与现有设计相比,它在时钟速度(36%),导线交叉(58%),容错(77.62%)和功耗方面均取得了显著成就。通过综合用于现场可编程门阵列(FPGA)的可配置逻辑块(CLB),进一步提高了提出的多路复用器的有效性。 (C)2015 Elsevier Ltd.保留所有权利。

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