A Hardware/Software Cosynthesis Method for CAM Processor with Area Constraints

摘要

We have been building the hardware/software cosynthesis system for a processor core with a content addressable memory (CAM). We input a description of an application program written in C language into the system, and the system outputs an optimal hardware configration of a CAM processor which executes an inputted application program. This paper extends our hardware/software cosynthesis system which incorporates area constraints for a CAM processor. The system computes the number of CAM words which minimizes the execution time with meeting the area constraints. We reduce the CAM processor's area by replacing CAM with RAM according to the word number that the system computed. Experimental results for practical application program show that the system can output a configration of the processor which executes the application program fastest with meeting the area constraints.