首页> 外文期刊>Journal of the Optical Society of America, A. Optics, image science, and vision >All-optical linear reconfigurable logic with nonlinear phase erasure
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All-optical linear reconfigurable logic with nonlinear phase erasure

机译:具有非线性相位擦除功能的全光线性可重构逻辑

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We introduce a novel all-optical logic architecture whereby the gates may be readily reconfigured to reprogram their logic to implement (N)AND/(N)OR/X(N)OR. A single gate structure may be used throughout the logic circuit to implement multiple truth tables. The reconfiguration is effected by an optical reference signal. The reference may also be adapted to an arbitrary Boolean complex alphabet at the gate logic inputs and calibrated to correct gate imperfections. The all-optical gate structure is partitioned into a linear interferometric front end and a nonlinear back end. In the linear section, two optical logic inputs, along with a reference signal, linearly interfere. The nonlinear back end realizes a phase-erasure (or phase-reset) function. The reconfiguration and recalibration capabilities, along with the functional decoupling between the linear and nonlinear sections of each gate, facilitate the potential aggregation of large gate counts into logic arrays. A fundamental lower bound for the expended energy per gate is derived as 3hv+kT ln 2 Joules per bit.
机译:我们介绍了一种新颖的全光逻辑架构,通过该架构,可以很容易地重新配置门,以对其逻辑进行重新编程,以实现(N)AND /(N)OR / X(N)OR。整个逻辑电路可以使用单个门结构来实现多个真值表。重新配置受到光参考信号的影响。该参考还可以适用于门逻辑输入处的任意布尔复数字母,并可以进行校准以校正门缺陷。全光闸结构分为线性干涉式前端和非线性后端。在线性部分,两个光学逻辑输入与参考信号一起线性干扰。非线性后端实现相位擦除(或相位重置)功能。重新配置和重新校准功能,以及每个门的线性和非线性部分之间的功能去耦,有助于将大量门数潜在地聚集到逻辑阵列中。每个门消耗的能量的基本下限为每位3hv + kT ln 2焦耳。

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