A low jitter supply regulated charge pump PLL with self-calibration

摘要

This paper describes a ring oscillator based low jitter charge pump PLL with supply regulation and digital calibration. In order to combat power supply noise, a low drop output voltage regulator is implemented. The VCO gain is tunable by using the 4 bit control self-calibration technique. So that the optimal VCO gain is automatically selected and the process/temperature variation is compensated. Fabricated in the 0.13 μm CMOS process, the PLL achieves a frequency range of 100-400 MHz and occupies a 190 × 200 μm~2 area. The measured RMS jitter is 5.36 ps at a 400 MHz operating frequency.