An Alternative Hybrid Power-Aware Adder for High-Performance Processors

摘要

In this work we introduce a hybrid CLA-Ripple Power-aware adder (or simply HICPA) for high performance processors. HICPA is a multi-component adder that saves power by avoiding aggressive usage of the Carry Look-Ahead adder for add operations using small operands. Instead, for small size operands, HICPA uses a small and power efficient Ripple Carry Adder. We evaluate HICPA for different adder sizes and technologies using a subset of SPEC'2K benchmarks and show that, after taking into account the associated power overhead, it is possible to reduce average ALU power dissipation up to 50%, 45% for 32-bit adders using 65 nm and 90 nm, technologies respectively. For 64-bit adders we reduce ALU power dissipation by 4.6% and 13.4% for adders using 65 nm and 90 nm technologies, respectively. We reduce ALU power while maintaining performance for all adder sizes and technologies studied in this work.