Low-Power Circuit Techniques for Epileptic Seizures Detection and Subsequent Neurostimulation

摘要

In this paper, we present low-power circuit techniques for implementing a closed-loop neurostimulator (CLNS) as an alternative treatment for medically refractory epilepsy. The proposed circuit has low-power dissipation with better detection sensitivity compared to the recently proposed circuit techniques for epileptic seizure detector. We demonstrate low-power circuit techniques for implementation of an implantable CLNS, individual functional testing, and validation of the seizure detector on real intracerebral EEG (icEEG) recordings and testing of self-triggering electrical stimulation. The CLNS comprises a low-power icEEG acquisition front-end, epileptic seizure detector, and a widely programmable current stimulator. Moreover, the tuneable parameters of the detector and stimulator are designed to adjust wirelessly. The detection algorithm was validated with Matlab tools and the detection circuits were implemented in 2 mm~2 chip area using CMOS 0.18-μm process. The current-mode stimulator was assembled on two circular (Φ 20 mm) shape blocks in a printed circuit board (PCB). The proposed CLNS was tested using icEEG recordings from seven patients with medically refractory epilepsy. The icEEG recordings were assessed by the proposed CLNS and the predefined seizure suppression biphasic electrical stimulations were triggered ～14.4 s after electrographical seizure onsets.