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A new digital-analog multiplex method using an adder circuit

机译:一种使用加法器电路的新型数模复用方法

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摘要

In this paper, we propose a new multiplex method for the Time-over-Threshold (ToT) method using an adder circuit to encode channel information in the pulse height. The proposed method is a combination of Multiple-Valued-Logic (MVL) and the ToT method for radiationdetection systems. In order to validate the method, a 12mm×12mm×12mm monolithic GAGG crystal was mounted on a 16ch HAMAMATSU MPPC, whose pixel size was 3mm×3mm. The input resistors of the adder circuit were set at 2 kW, 4 kW, 8 kW, 16 kW, and so on, and the feedback resistor was set at 1 kW. Therefore, the output voltage becomes 1/2, 1/4, 1/8, · · · , for ch1, ch2, ch3, · · · , respectively. A 4ch-input multiplex, which corresponds to 16-valued logic, was successfully verified. However, an 8ch-input multiplex corresponding to 256-valued logic was not verified, owing to noise factors such as ringing and overshoot. Therefore, a new decoding algorithm or a noise-cutting circuit is needed.
机译:在本文中,我们提出了一种新的多路复用方法,用于使用加法器电路在脉冲高度中编码通道信息的阈值时间(ToT)方法。所提出的方法是辐射检测系统的多值逻辑(MVL)和ToT方法的结合。为了验证该方法,将12mm×12mm×12mm的单片GAGG晶体安装在像素尺寸为3mm×3mm的16ch HAMAMATSU MPPC上。加法器电路的输入电阻设置为2 kW,4 kW,8 kW,16 kW等,反馈电阻设置为1 kW。因此,对于ch1,ch2,ch3,···,输出电压分别变为1 / 2、1 / 4、1 / 8,···。已成功验证了对应于16值逻辑的4通道输入多路复用器。但是,由于诸如振铃和过冲之类的噪声因素,未验证与256值逻辑对应的8ch输入多路复用器。因此,需要一种新的解码算法或降噪电路。

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