Galvanic Corrosion of Stacked Metal Gate Electrodes During Cleaning in HF Solutions

摘要

According to the ITRS Roadmap [1], new dielectric and metal gate materials will be required for high performance and low stand-by power applications at the 45 nm technology node and beyond. Currently, many candidate materials are under investigation. Based on the state-of-the-art [2,3,4], some of the most likely candidates to be used as metal gate electrodes include TiN, TaN, Mo and Ru To address the workfunction tuning issue in this future generation of transistors, a possible approach is to use a metal layer on the high-k dielectric to control the workfunction and a conductor material on top to make the gate electrical contact (fig, 1) As a result, it creates a risk of galvanic enhanced corrosion at the gate electrode level during wet cleaning. We have studied galvanic coupling between the dissimilar materials of the gate electrode (TiN, Mo, Ru, PolySilicon), The study focuses on diluted HF mixtures, which in general show overall better compatibility with metal gates than strong oxidizing chemistries. Diluted HF based mixtures are used for residualJfigh-k removal and post-etch residues removal [5], In addition, it is also used for removal oij|)xide hardmask after etching of the metal gate stack.