Critical Layer Thickness in Exponentially Graded Heteroepitaxial Layers

摘要

Exponentially graded semiconductor layers are of interest for use as buffers in heteroepitaxial devices because of their tapered dislocation density and strain profiles. Here we have calculated the critical layer thickness for the onset of lattice relaxation in exponentially graded In_(x)Ga_(1-x)As/GaAs (001) heteroepit-axial layers. Upwardly convex grading with x velence x_(infinity) (1 - e~(-gamma/y)) was considered, where y is the distance from the GaAs interface, gamma is a grading length constant, and x_(infinity) is the limiting mole fraction of In. For these structures the critical layer thickness was determined by an energy-minimization approach and also by consideration of force balance on grown-in dislocations. The force balance calculations underestimate the critical layer thickness unless one accounts for the fact that the first misfit dislocations are introduced at a finite distance above the interface. The critical layer thickness determined by energy minimization, or by a detailed force balance model, is approximately h_(c) approx= 0.243 (mu)m(gamma/1 (mu)m)~(0.5)(x_(infinity)/0.1)~(-0.54). Although these results were developed for exponentially graded In_(x)Ga_(1-x)As/GaAs (001), they may be generalized to other material systems for application to the design of exponentially graded buffer layers in metamorphic device structures such as modulation-doped field-effect transistors and light-emitting diodes.