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首页> 外文期刊>Journal of Electronic Testing: Theory and Applications: Theory and Applications >On-Line Techniques for Error Detection and Correction in Processor Registers with Cross-Parity Check
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On-Line Techniques for Error Detection and Correction in Processor Registers with Cross-Parity Check

机译:具有交叉奇偶校验的处理器寄存器中错误检测和纠正的在线技术

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摘要

This paper proposes the Cross-Parity check as a method for an on-line detection of multiple bit-errors in registers or register files of microprocessors. Transient or 'soft' errors caused by radiation as single event upsets (SEUs) or electromagnetic coupling are in the focus of this work. Especially for register files or register groups, an easy implementable error correction method is proposed, which can be implemented by software routines or additional hardware. The method is based on the logical interpretation of Cross-Parity vectors.
机译:本文提出了交叉奇偶校验作为在线检测微处理器的寄存器或寄存器文件中的多个误码的方法。由辐射引起的瞬态或“软”错误是单事件翻转(SEU)或电磁耦合引起的,是本工作的重点。特别是对于寄存器文件或寄存器组,提出了一种易于实现的纠错方法,该方法可以通过软件例程或附加硬件来实现。该方法基于交叉奇偶校验矢量的逻辑解释。

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