...
首页> 外文期刊>Discrete Applied Mathematics >The delay of circuits whose inputs have specified arrival times
【24h】

The delay of circuits whose inputs have specified arrival times

机译:输入具有指定到达时间的电路的延迟

获取原文
获取原文并翻译 | 示例

摘要

Let C be a circuit representing a straight-line program on n inputs x(1), x(2),...,x(n). If for 1 <= i <= n an arrival time t(i) epsilon N-0 for x(i) is given, we define the delay of x(i) in C as the sum of t(i) and the maximum number of gates on a directed path in C starting in xi. The delay of C is defined as the maximum delay of one of its inputs. The notion of delay is a natural generalization of the notion of depth. It is of practical interest because it corresponds exactly to the static timing analysis used throughout the industry for the analysis of the timing behaviour of a chip. We prove a lower bound on the delay and construct circuits of close-to-optimal delay for several classes of functions. We describe circuits solving the prefix problem on n inputs that are of essentially optimal delay and of size O(n log(log n)). Finally, we relate delay to formula size. (c) 2006 Elsevier B.V. All rights reserved.
机译:令C为代表n个输入x(1​​),x(2),...,x(n)上的直线程序的电路。如果对于1 <= i <= n,给出x(i)的到达时间t(i)epsilon N-0,则将C中x(i)的延迟定义为t(i)与最大值的和从xi开始的C中有向路径上的门数。 C的延迟定义为其输入之一的最大延迟。延迟的概念是深度概念的自然概括。它具有实际意义,因为它与整个行业中用于分析芯片时序行为的静态时序分析完全对应。我们证明了延迟的下限,并为几类功能构建了接近最佳延迟的电路。我们描述了在n个输入上解决前缀问题的电路,这些输入实际上具有最佳延迟并且大小为O(n log(log n))。最后,我们将延迟与公式大小相关联。 (c)2006 Elsevier B.V.保留所有权利。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号