MS-Excel Based HDL Code Generation for System-on-Chip Designs

摘要

To meet strict time to market requirements and still to achieve high quality in system-on-chip (SoC) design requires that existing design blocks are used. Documentation of a complex design is essential for the reuse and also for the verification of the design. However, it may be challenging to document details such as interrupt or DMA request connections in a multi-processor system and keep the documentation up to date. Spreadsheet applications, such as MS-Excel, are often used to design and document certain parts of system-on-chip designs. For example interrupt and DMA connections and IO pin multiplexing are such subsystems, which are natural to describe in a table format. To facilitate the implementation, the actual HDL code can be automatically generated from the spreadsheet documentation. The benefit of this approach is that the HDL implementation is always in tact with the documentation and vice versa. The quality of design and documentation is also usually better when the manual coding is not needed, and all the changes are done only to one place: to the documentation. In addition, h-files and compilation scripts needed later in the flow can be generated along with the HDL code, which facilitates the use of the design. This paper presents an approach and a tool to generate VHDL code and h-files from MS-Excel spreadsheet. The approach is presented with two examples: interrupt connections and I/O pin multiplexing. The results show that the method dramatically reduces the time needed to the subsystem implementation.