Design of 4-Bit Reversible Shift Registers

摘要

In recent years, Reversible logic has emerged as a major area of research due to its ability to reduce the power dissipation which is the main requirement in the low power digital circuit design. It has wide applications like low power CMOS design, Nano-technology, Digital signal processing, Communication, DNA computing and Optical computing. In this paper, we have proposed a new 4×4 reversible gate and it is being used t o r ealize t he D-latch a nd D -flip-flop i n t he reversible dom ain. T he t ransistor r epresentation of t he proposed reversible D-flip-flop is implemented using adiabatic logic. Also a 4-bit reversible SISO, SIPO, PISO and PIPO shift registers has been designed using the proposed reversible d-flip-flop. Proposed circuits have been simulated using Modelsim and synthesized using Xilinx Virtex5vlx30tff665-3.