Static and Transient Voltage Stability Assessment of Power System by Proper Placement of UPFC with POD Controller

摘要

Optimal Location of FACTS devices are very important for the rapid and successful operation because of high cost and circuit complexities. In this paper best location of UPFC (Unified Power Flow Controller) is obtained both for static and transient voltage stability enhancement of an IEEE 14 bus power system. The simulation is done on PSAT (Power System Analysis Tool-box) in MATLAB and optimal location is found out by Continuation Power Flow (CPF), VCPI (Voltage Collapse Proximity Index) and Fast voltage Stability Index (FVSI). The bus having lowest voltage is the critical bus and the line having largest value of index for maximum permissible load with respect to a bus is the most critical line referred to that bus. It is found that by properly placing UPFC loadability margin of the system has been increased considerably leading to improvement of voltage stability and stability index value decreases at each reactive load with the insertion of the device at right place. Transient stability analysis is also done for an IEEE 14 bus system with a three phase fault created at a bus. It is found from the time domain simulation that proper placement of UPFC increases the transient performance of the system by damping out the power oscillation under large disturbance conditions with less settling time.