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首页> 外文期刊>Chemistry of Materials: A Publication of the American Chemistry Society >Push-Pull π-Electron Phosphonic-Acid-Based Self-Assembled Multilayer Nanodielectrics Fabricated in Ambient for Organic Transistors
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Push-Pull π-Electron Phosphonic-Acid-Based Self-Assembled Multilayer Nanodielectrics Fabricated in Ambient for Organic Transistors

机译:用于有机晶体管的环境中制造的推挽π电子膦酸基自组装多层纳米电介质

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摘要

Organic thin-film transistors (OTFTs) are of great current interest for future organic electronics applications such as RF-ID cards, flexible displays, and sensors. Despite recent progress, large OTFT operating voltages, reflecting the intrinsically low mobilities of organic semiconductors, remain one of the major challenges to overcome. For portable applications such as RF-ID tags and displays, it is mandatory to achieve high TFT drain currents (I_(SD)) at acceptably low operating voltages. Several approaches have been proposed to achieve these goals, one of which is to reduce channel lengths due to the inverse proportionality between I_(SD) and the channel length. However, this approach requires expensive lithographies to pattern small features and commensurate scaling of the gate dielectric thickness. For the same device geometry and semiconductor material, equivalent OTFT I_(SD) parameters should be achievable at lower operating voltages by increasing the gate dielectric capacitance C_i, given by eq 1, where ε0 is the vacuum permittivity, k is the dielectric constant, and d is the thickness of dielectric layer.
机译:对于未来的有机电子应用,例如RF-ID卡,柔性显示器和传感器,有机薄膜晶体管(OTFT)引起了广泛的关注。尽管取得了最新进展,但大的OTFT工作电压反映了有机半导体固有的低迁移率,仍然是需要克服的主要挑战之一。对于诸如RF-ID标签和显示器之类的便携式应用,必须在可接受的低工作电压下获得高TFT漏极电流(I_(SD))。已经提出了几种方法来实现这些目标,其中一种方法是由于I_(SD)与通道长度之间的反比例关系而减小通道长度。然而,这种方法需要昂贵的光刻来图案化小的特征并相应地缩小栅极电介质的厚度。对于相同的器件几何结构和半导体材料,应通过增加栅极介电电容C_i来在较低的工作电压下获得等效的OTFT I_(SD)参数(由等式1给出),其中ε0是真空介电常数,k是介电常数,并且d是介电层的厚度。

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