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An approximate mathematical framework for resource-constrained multistage batch scheduling

机译:资源受限的多阶段批处理调度的近似数学框架

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A rigorous representation of the multistage batch scheduling problem is often useless to even provide a good feasible schedule for many real-world industrial facilities. In order to derive a much simpler scheduling methodology, some usual features of multistage batch plants should be exploited. A common observation in industry is that multistage processing structures usually present a bottleneck stage (BS) controlling the plant output level. Therefore, the quality of the production schedule heavily depends on the proper allocation and sequencing of the tasks performed at the stage BS. Every other part of the processing sequence should be properly aligned with the selected timetable for the bottleneck tasks. A closely related concept with an empirical basis is the usual existence of a common batch sequencing pattern along the entire processing structure that leads to define the constant-batch-ordering rule (CBOR). According to this rule, a single sequencing variable is sufficient to establish the relative ordering of two batches at every processing stage in which both have been allocated to the same resource item. This work introduces a CBOR-based global precedence formulation for the scheduling of order-driven multistage batch facilities. The proposed MILP approximate problem representation is able to handle sequence-dependent changeovers, delivery due dates and limited manufacturing resources other than equipment units. Optimal or near-optimal solutions to several large-scale examples were found at very competitive CPU times.
机译:多阶段批处理调度问题的严格表示对于为许多现实世界的工业设施甚至提供良好的可行调度表通常是没有用的。为了获得更简单的调度方法,应利用多级批处理工厂的一些常规功能。工业上的普遍观察是,多级处理结构通常会出现瓶颈阶段(BS),以控制工厂的产出水平。因此,生产进度表的质量在很大程度上取决于在阶段BS执行的任务的正确分配和排序。处理序列的其他每个部分都应与瓶颈任务的选定时间表正确对齐。与经验密切相关的概念是整个处理结构中常见的批量排序模式的通常存在,导致定义了恒定批量排序规则(CBOR)。根据此规则,单个排序变量足以在每个处理阶段建立两个批次的相对排序,在这两个阶段中,两个批次均已分配给同一资源项。这项工作介绍了基于CBOR的全局优先级公式,用于计划订单驱动的多阶段批处理设施。拟议的MILP近似问题表示法能够处理与序列有关的转换,交货截止日期以及除设备单元以外的有限制造资源。在竞争激烈的CPU时间中,找到了针对几个大型示例的最佳或接近最佳解决方案。

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