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Wideband Channelization Architectures in ASICs & FPGAs

机译:ASIC和FPGA中的宽带信道化架构

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摘要

Today, "off-of-the-shelf" highspeed ADCs are available with conversion rates of up to 1.5 Gsps. And even though technology constantly improves dynamic range, the area of signal processing immediately following the ADC is still challenging. Typical processing at this stage involves frequency conversion and channelization. While standard DDC technologies exist for the selection of narrowband channels from a medium bandwidth spectrum, they are limited to only a few simultaneous channels for an economical amount of silicon.
机译:如今,“现成的”高速ADC的转换速率高达1.5 Gsps。尽管技术不断提高动态范围,但紧随ADC之后的信号处理领域仍然充满挑战。此阶段的典型处理包括频率转换和信道化。虽然存在用于从中带宽频谱中选择窄带通道的标准DDC技术,但对于经济数量的硅,它们仅限于少数几个同时通道。

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