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机译:一个14位200-MS / S的SHA的流水线ADC,减少光圈误差
Tsinghua Univ Inst Microelect Beijing 100084 Peoples R China;
Tsinghua Univ Inst Microelect Beijing 100084 Peoples R China;
Tsinghua Univ Inst Microelect Beijing 100084 Peoples R China;
Tsinghua Univ Inst Microelect Beijing 100084 Peoples R China;
Tsinghua Univ Inst Microelect Beijing 100084 Peoples R China;
Tsinghua Univ Inst Microelect Beijing 100084 Peoples R China;
Apertures; Capacitors; Pipelines; Threshold voltage; Calibration; Power demand; Clocks; Aperture error; capacitor splitting; comparator interpolation; path combining; pipelined analog-to-digital converter (ADC); sample-and-hold amplifier-less (SHA-less);
机译:一个无SHA的14位,100-MS / s流水线ADC,在后台具有比较器失调消除功能
机译:具有89 dB SFDR和74.5 dB SNR的14位100 MS / s无SHA流水线ADC
机译:具有采样时间误差校准的14位200-MS / s时间交错ADC
机译:采用130nm CMOS的无SHA的12位200-Ms / s流水线ADC的第一阶段设计
机译:亚稳态误差率<10(-15指数)误差/样本的流水线ADC
机译:ADC对多中心乳房DWI试验中的梯度非线性误差的追溯校正:ACRIN6698多平台可行性研究
机译:具有89 dB SFDR和74.5 dB SNR的14位100 MS / S SHA的流水线ADC