...
首页> 外文期刊>IEEE transactions on very large scale integration (VLSI) systems >A VLSI architecture for watermarking in a secure still digital camera (S/sup 2/DC) design
【24h】

A VLSI architecture for watermarking in a secure still digital camera (S/sup 2/DC) design

机译:在安全静态数码相机(S / sup 2 / DC)设计中用于加水印的VLSI架构

获取原文
获取原文并翻译 | 示例

摘要

Watermarking is the process that embeds data called a watermark, a tag, or a label into a multimedia object, such as images, video, or text, for their copyright protection. According to human perception, the digital watermarks can be divided into four categories.. A watermark is a secondary translucent image overlaid into the primary image and appears to a viewer on a careful inspection. The in watermark is embedded in such a way that the modifications made to the pixel value is perceptually not noticed, and it can be recovered only with an appropriate decoding mechanism. This paper presents a new very large scale integration (VLSI) architecture for implementing two digital image watermarking schemes. The proposed architecture is designed to aim at easy integration into any existing digital camera framework. To the authors' knowledge, this is the first VLSI architecture for implementing watermarking schemes. A prototype chip consisting of 28 469 gates is implemented using 0.35-/spl mu/ technology, which consumes 6.9-mW power while operating at 292 MHz.
机译:水印是将称为水印,标签或标签的数据嵌入到多媒体对象(例如图像,视频或文本)中以保护其版权的过程。根据人类的感知,数字水印可分为四类。水印是覆盖在主图像上的第二个半透明图像,在查看者仔细检查后会显示出来。嵌入水印的方式是不会感觉到对像素值所做的修改,并且只能使用适当的解码机制将其恢复。本文提出了一种新的超大规模集成(VLSI)架构,用于实现两种数字图像水印方案。提出的体系结构旨在易于集成到任何现有的数码相机框架中。据作者所知,这是第一个用于实现水印方案的VLSI架构。使用0.35- / spl mu /技术实现了由28 469个门组成的原型芯片,该芯片在292 MHz的工作频率下功耗为6.9mW。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号