Part 1 of the Designers Notebook focused on design guidelines for chipscale packages (CSP) and area-array devices like BGAs. Design protocols establish land pattern requirements for their attachment. Part 2 examines the role of solder stencils and alloy properties in creating reliable solder joints between PCB and device. In developing the solder paste stencil for surface mount assembly, process engineers will use the basic land pattern feature geometries furnished in CAD files for PCB fabrication. In developing the master for the circuit board, the designer becomes aware that fine-pitch BGA-packaged ICs are available in a range of pitch and contact-diameter variations, each having a unique tolerance limit. For a 0.45-mm-diameter ball contact, for example, the allowable tolerance range is 12 μm, while the 0.40-mm-diameter contact has a 10 μm range. As noted in Part 1 at smtonline.com, IPC-7095 suggests that the land pattern diameter on the substrate be furnished 20% smaller than the nominal ball contact size.
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