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Dual delta tunnel FET: An energy efficient switch with improved current switching ratio and steeper subthreshold slope

机译:双三角隧道FET:一种节能开关,具有更高的电流开关比和更陡的亚阈值斜率

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摘要

In this paper, a single gate tunnel FET has been designed with two delta layers in both the source and channel regions. The width, position and doping concentration of both the delta regions are optimized to maximize the current switching ratio. The simulation work of the present DD-TFET device has been carried out by 2-D TCAD device simulator from Synopsys and the results are compared with the results of source delta doped TFET (SD-TFET), channel delta doped TFET (CD-TFET) and conventional TFET. The proposed device exhibits its superiority over other designs in terms of ON-state current, current switching ratio and subthreshold swing. Thus DD-TFET can be used as an energy efficient switch and has the potential to replace MOSFETs in high-speed and low-power applications.
机译:在本文中,已经设计了一个单栅极隧道FET,在源极和沟道区域均具有两个δ层。两个三角区的宽度,位置和掺杂浓度都经过优化,以使电流开关比最大。本DD-TFET器件的仿真工作已由Synopsys的2-D TCAD器件仿真器完成,并将结果与​​源三角洲掺杂TFET(SD-TFET),沟道三角洲掺杂TFET(CD-TFET)的结果进行了比较。 )和传统的TFET。所提出的器件在导通状态电流,电流开关比和亚阈值摆幅方面表现出优于其他设计的优势。因此,DD-TFET可用作节能开关,并有潜力在高速和低功率应用中取代MOSFET。

著录项

  • 来源
    《Superlattices and microstructures》 |2017年第7期|219-227|共9页
  • 作者单位

    Device Simulation Lab, Dept. of Electronics & Communication Engineering, Institute of Technical Education & Research, Siksha 'O' Anusandhan University, Khandagiri, Bhubaneswar, India;

    Device Simulation Lab, Dept. of Electronics & Communication Engineering, Institute of Technical Education & Research, Siksha 'O' Anusandhan University, Khandagiri, Bhubaneswar, India;

    Device Simulation Lab, Dept. of Electronics & Communication Engineering, Institute of Technical Education & Research, Siksha 'O' Anusandhan University, Khandagiri, Bhubaneswar, India;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Delta doping; Current switching ratio; Subthreshold swing; TCAD;

    机译:Delta掺杂;电流开关比;亚阈值摆动;计算机辅助设计;

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