Instrumentation V: Toward serviceability: Built-in calibrating and self-testing features are two ways of easing servicing problems. But digital circuits present unique problems

Allan R.

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Instrumentation V: Toward serviceability: Built-in calibrating and self-testing features are two ways of easing servicing problems. But digital circuits present unique problems

机译：仪器V：易于维修：内置的校准和自检功能是缓解维修问题的两种方法。但是数字电路存在独特的问题

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Built-in calibrating and self-testing features are two ways of easing servicing problems. But digital circuits present unique problems.

机译：内置的校准和自检功能是缓解维修问题的两种方法。但是数字电路存在独特的问题。

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《Spectrum, IEEE》 |1974年第11期|p.64-68|共5页
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Allan R.;
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正文语种 eng
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digital circuits; maintenance engineering; calibration; digital circuits; repair; serviceability; servicing problems; Built-in self-test; Calibration; Circuit faults; Instruments; Maintenance engineering; Radiation detectors; Reliability;

机译：数字电路;维修工程;校准;数字电路;修理;可维护性;服务问题;内置自检;校准;电路故障;仪器;维修工程;辐射探测器;可靠性;

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1. The Method of Parallel-Sequential Built-in Self-testing in Integrated Circuits of the Type SFPGAS [J] . G. P. Aksenova, V. F. Khalchev Automation and Remote Control . 2007,第1期

机译：SFPGAS型集成电路中的并行顺序内置自检方法
2. Parity Bit Signature in Response Data Compaction and Built-In Self-Testing of VLSI Circuits With Nonexhaustive Test Sets [J] . Sunil R. Das, Made Sudarma, Mansour H. Assaf, IEEE Transactions on Instrumentation and Measurement . 2003,第5期

机译：具有非详尽测试集的VLSI电路的响应数据压缩和内置自测试中的奇偶校验位签名
3. Built-in self-testing of VLSI circuits-getting errors to catch themselves [J] . Das S.R. IEEE potentials . 1991,第3期

机译：内置的VLSI电路自检功能，可发现错误并及时发现
4. Parity BIT signature in response data compaction and built-in self-testing of VLSI circuits with compact test sets [C] . Sunil R. Das, Made Sudarma, Jingyi Liang, IEEE Midwest Symposium on Circuits and Systems . 2001

机译：响应数据压实中的奇偶校验位签名和Compact Test集的VLSI电路的内置自测
5. Deterministic built-in self test for digital circuits. [D] . Al-Yamani, Ahmad A. 2004

机译：确定性的内置数字电路自检功能。
6. Response Dissociation in Hierarchical Cortical Circuits: a Unique Feature of Autism Spectrum Disorder [O] . Tamar Kolodny, Michael-Paul Schallmo, Jennifer Gerdts, 2020

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7. Digital Circuits Resynthesis Approach for FPGAs Based on Logic Cell with Built-In Flip-Flop [O] . I.V. Tiunov, I.A. Lipatov, D.A. Zheleznikov 2019

机译：基于逻辑单元的FPGA与内置触发器的数字电路重新合成方法

Instrumentation V: Toward serviceability: Built-in calibrating and self-testing features are two ways of easing servicing problems. But digital circuits present unique problems

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