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A low-power baseband receiver IC for frequency-hopped spread spectrum communications

机译:用于跳频扩频通信的低功耗基带接收器IC

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摘要

A baseband receiver IC which will be incorporated into a low-power frequency-hopped spread spectrum (FH/SS) transceiver for 902-928 MHz ISM band applications is presented. The chip performs noncoherent binary/quaternary frequency shift keying (FSK) demodulation, equal-gain diversity combining of dual antenna branches, and symbol and frequency synchronization. The chip also accommodates variable data rates from 2 to 160 kb/s, programmable hop rates, and tunable bandwidth Loop filters. The core area of the 1-/spl mu/m CMOS chip is 3.9 mm/spl times/3.9 mm with a power consumption of 4.5 mW at 10 MHz from a 3-V supply. A baseband transceiver system utilizing this receiver chip for the prototype handset to demonstrate a point-to-point communication link is also described. Two XILINX FPGA chips were used to implement the remainder of the baseband transceiver functions, including frequency control logic for FSK modulation, acquisition control, data framing, symbol interleaving and deinterleaving, and interface control for data and voice.
机译:提出了一种基带接收器IC,该IC将被并入用于902-928 MHz ISM频段应用的低功率跳频扩频(FH / SS)收发器中。该芯片执行非相干二进制/四进制频移键控(FSK)解调,双天线分支的等增益分集组合以及符号和频率同步。该芯片还可以容纳2至160 kb / s的可变数据速率,可编程的跳频速率和可调带宽的环路滤波器。 1- / spl mu / m CMOS芯片的核心面积为3.9 mm / spl倍/3.9 mm,在使用3-V电源时10 MHz时的功耗为4.5 mW。还描述了一种基带收发器系统,该系统利用该接收器芯片为原型手机展示了点对点通信链路。两个XILINX FPGA芯片用于实现其余的基带收发器功能,包括用于FSK调制的频率控制逻辑,采集控制,数据成帧,符号交织和解交织以及数据和语音的接口控制。

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