A 16-bit carry-lookahead adder using reversible energy recoverylogic for ultra-low-energy systems

摘要

In this paper, we describe an energy-efficient carry-lookaheadnadder using reversible energy recovery logic (RERL), which is a newndual-rail reversible adiabatic logic. We also describe an eight-phase,nclocked power generator that requires an off-chip inductor. For thenenergy-efficient design of reversible logic, we explain how to controlnthe overhead of reversibility with a self-energy-recovery circuit. Antest chip was implemented with a 0.8 Μm CMOS technology, whichnincluded two 16-bit carry-lookahead adders to allow fair comparison: annRERL one and a static CMOS one. Experimental results showed that thenRERL adder had substantial advantages in energy consumption over thenstatic CMOS one at low operating frequencies. We also confirmed that wencould minimize the energy consumption in the RERL circuit by reducingnthe operating frequency until adiabatic and leakage losses were equal