A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC

摘要

A low-power 10-bit converter that can sample input frequenciesnabove 100 MHz is presented. The converter consumes 55 mW when samplingnat fs=40 MHz from a 3-V supply, which also includes a bandgapnand a reference circuit (70 mW if including digital drivers with a 10-pFnload). It exhibits higher than 9.5 effective number of bits for an inputnfrequency at Nyquist (fin=fs/2=20 MHz). Thendifferential and integral nonlinearity of the converter are withinn±0.3 and ±0.75 LSB, respectively, when sampling at 40 MHz,nand improve to a 12-bit accuracy level for lower sampling rates. Thenoverall performance is achieved using a pipelined architecture without andedicated sample/hold amplifier circuit at the input. The converter isnimplemented in double-poly, triple-metal 0.35-Μm CMOS technology andnoccupies an area of 2.6 mm2