A Fully Integrated 0.13- $mu$m CMOS Digital Low-IF DBS Satellite Tuner Using a Ring Oscillator-Based Frequency Synthesizer

摘要

A low-IF fully integrated tuner for DBS satellite TV applications has been realized in 0.13-$mu{hbox {m}}$ CMOS. A wideband ring oscillator-based frequency synthesizer having a large frequency step was used to downconvert a cluster of channels to a sliding low-IF frequency, while the second downconversion to baseband was performed in the digital domain. Eliminating the inductors and using a small-area oscillator has reduced both the parasitic magnetic and substrate coupling, allowing single-chip integration of the sensitive tuner and the noisy digital demodulator. A significant reduction in die area was achieved by using a single oscillator to cover the entire satellite TV spectrum, while a noise attenuator was cascaded with the PLL passive loop filter to reduce the equivalent VCO tuning gain. This improves PLL noise and spur performance and allows the on-chip integration of the loop filter. The digital low-IF tuner allows the use of a discrete step AGC loop that results in lower noise figure and higher linearity. Automatic signal path gain and bandwidth digital calibration was realized using replica ring oscillators. Tuner specifications include: 90 dB gain range, 10 dB noise figure at max gain, $+$ 25 dBm IIP3 at min gain, 1.3 $^{circ}$ rms integrated phase noise, $<-$50 dBc spurs, 0.5-W power consumption from dual 1.8/3.3-V supplies, and ${hbox{1.8}}times {hbox{1.2}} {hbox {mm}}^{2}$ die area.