A 14 mW Fractional-N PLL Modulator With a Digital Phase Detector and Frequency Switching Scheme

摘要

In this work an all-digital phase detector for a fractional-${N}$ PLL is proposed and demonstrated. The phase detector consists of a single flip-flop, which acts as an oversampled 1 bit phase quantizer. A digital sampling scheme that enables FSK modulation rates much larger than the loop bandwidth is demonstrated, without compromising on the frequency accuracy of the output signal. A prototype 2.2 GHz fractional-${N}$ synthesizer incorporating the digital phase detector and sampling scheme is presented as a proof of concept. Although the loop bandwidth is only 142 kHz, an FSK modulation rate of 927.5 kbs is achieved. The 0.7 ${hbox{mm}}^{2}$ prototype is implemented in 0.13 $mu{hbox{m}}$ CMOS consumes 14 mW from a 1.4 V supply.