机译:使用三穴背景校准器的低抖动和低参考喷射环 - 基于锁定的锁定时钟倍增器
Korea Adv Inst Sci & Technol KAIST Sch Elect Engn Daejeon 34141 South Korea;
Ulsan Natl Inst Sci & Technol UNIST Sch Elect Engn Ulsan 44919 South Korea;
Korea Adv Inst Sci & Technol KAIST Sch Elect Engn Daejeon 34141 South Korea;
Ulsan Natl Inst Sci & Technol UNIST Sch Elect Engn Ulsan 44919 South Korea;
Ulsan Natl Inst Sci & Technol UNIST Sch Elect Engn Ulsan 44919 South Korea;
Korea Adv Inst Sci & Technol KAIST Sch Elect Engn Daejeon 34141 South Korea;
Voltage-controlled oscillators; Jitter; Clocks; Phase locked loops; Frequency modulation; Phase modulation; Calibration; Calibrator; frequency error; injection-locked clock multiplier (ILCM); phase noise; reference spur; RMS jitter; slope modulation;
机译:具有背景校准基准倍频器的2.5–5.75 GHz基于环的注入锁定时钟乘法器
机译:使用基于97-μW变压器的VCO具有18 kHz闪烁噪声角的低抖动注射锁定时钟倍增器
机译:基于PVT稳健且低抖动环VCO的注入锁定时钟乘法器,具有使用复制延迟单元和双边沿相位检测器的连续频率跟踪环路
机译:使用背景三点频率/相位/斜率校准器的30.9 A 140fs
机译:基于锁相环(PLL)的时钟和数据恢复电路(CDR),使用经过校准的延迟触发器(DFF)。
机译:基于脉冲注射锁定振荡器的低抖动可编程时钟乘法器,具有高度数字调谐环路