A Low-Jitter Injection-Locked Clock Multiplier Using 97-µW Transformer-Based VCO with 18-kHz Flicker Noise Corner

摘要

This paper presents a high jitter performance injectionlocked clock multiplier (ILCM) using an ultra-low power (ULP) voltagecontrolled oscillator (VCO) for IoT application in 65-nm CMOS. The proposed transformer-based VCO achieves low flicker noise corner and sub-100 uW power consumption. Double cross-coupled NMOS transistors sharing the same current provide high transconductance. The network using high-Q factor transformer (TF) provides a large tank impedance to minimize the current requirement. Thanks to the low current bias with a small conduction angle in the ULP VCO design, the proposed TF-based VCO s flicker noise can be suppressed, and a good PN can be achieved in flicker region (1/ f 3) with sub-100 uWpower consumption. Thus, a high figure-ofmerit (FoM) can be obtained at both 100 kHz and 1MHz without additional inductor. The proposed VCO achieves phase noise of-94.5/-115.3 dBc/Hz at 100 kHz/1MHz frequency offset with a 97 uW power consumption, which corresponds to a-193/-194 dBc/Hz VCO FoM at 2.62 GHz oscillation frequency. The measurement results show that the 1/ f 3 corner is below 60 kHz over the tuning range from 2.57 GHz to 3.40 GHz. Thanks to the proposed low power VCO, the total ILCM achieves 78 fs RMS jitter while using a high reference clock. A 960 fs RMS jitter can be achieved with a 40MHz common reference and 107 uW corresponding power.