...
机译:具有二阶噪声耦合的24.7 mW 65 nm CMOS SAR辅助CTΔΣ调制器可实现45 MHz带宽和75.3 dB SNDR
Texas Analog Center of Excellence, University of Texas at Dallas, Richardson, TX, USA;
Texas Analog Center of Excellence, University of Texas at Dallas, Richardson, TX, USA;
Texas Analog Center of Excellence, University of Texas at Dallas, Richardson, TX, USA;
Texas Analog Center of Excellence, University of Texas at Dallas, Richardson, TX, USA;
Modulation; Topology; Bandwidth; Couplings; CMOS integrated circuits; Quantization (signal); Transfer functions;
机译:一个2.8 GS / s 44.6 mW时间交错ADC在65 nm CMOS中实现50.9 dB SNDR和1.5 GHz的3 dB有效分辨率带宽
机译:使用基于Gm-C的噪声成形量化器和数字积分器的7.2mW 75.3dB SNDR 10MHz BW CTΔ-Σ调制器
机译:一个具有25 MHz带宽的8.5 mW连续时间调制器,使用数字背景DAC线性化可实现63.5 dB SNDR和81 dB SFDR
机译:A 24.7MW 45MHz-BW 75.3DB-SNDR SAR辅助CTΔΣ调制器,在65nm CMOS中具有2nd级噪声耦合
机译:45 nm CMOS技术中全集成低噪声放大器(LNA)的设计,故障建模和测试,用于芯片间无线互连
机译:一个0.2至2MHz带宽,50至86dB SNDR,16至22mW灵活的四阶ΣΔ调制器,在1.2V 90nm CMOS中具有DC至44MHz可调中心频率