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Electrical properties of crystalline YSZ films on silicon as alternative gate dielectrics

机译:硅上晶体YSZ薄膜的电学性质作为替代栅极电介质

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Crystalline yttria-stabilized zirconia oxide (YSZ) film was successfully deposited on a silicon wafer without an interfacial amorphous SiO_2 layer The film with equivalent oxide thickness t_eox down to 1.77 nm shows negligible hysteresis and low interface state density, less than 3 × 10~11 cm~-2 eV~-1. The leakage current density for t_eox = 1.77 nm film, 1.5 × 10~-5 A cm~-2 at l V bias voltage, is five orders of magnitude lower than that for SiO_2 with the same equivalent oxide thickness. The results demonstrate that an ultra--thin YSZ film has sufficient resistivity against the formation of an underlying amorphous layer, and can be a promising gate dielectric replacing SiO_2 to reduce the feature size of devices.
机译:在没有界面非晶SiO_2层的硅晶片上成功沉积了氧化钇稳定的氧化锆(YSZ)晶体膜。当量氧化物厚度t_eox低至1.77 nm时,该膜具有可忽略的滞后性和低界面态密度,小于3×10〜11 cm〜-2 eV〜-1。 t_eox = 1.77 nm薄膜的漏电流密度,在1 V偏置电压下为1.5×10〜-5 A cm〜-2,比具有相同等效氧化物厚度的SiO_2低了五个数量级。结果表明,超薄YSZ膜具有足够的抵抗性,可抵抗下面的非晶层的形成,并且可以替代SiO_2以减小器件的特征尺寸,成为一种很有前途的栅极电介质。

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