On-state and RF performance investigation of sub-50 nm L-DUMGAC MOSFET design for high-speed logic and switching applications

摘要

In this paper, an extensive study on the on-state, switching and RF performance of a laterally amalgamated dual material gate concave (L-DUMGAC) MOSFET and the influence of technology variations such as gate length, negative junction depth (NJD) and gate bias on the device's behavior is performed using an ATLAS device simulator. Simulations reveal that the L-DUMGAC design exhibits a significant enhancement in the device's switching characteristics in terms of reduced on-resistance and, hence, the reduced conduction power loss, switching loss and enhanced on-current, I_(ON). Further, the L-DUMGAC design is studied for the RF application circuit design by examining the stability, cut-off frequency, power gains and the parasitic capacitances. The results are, thus, useful for optimizing the performance and reliability of nanoscale L-DUMGAC MOSFETs for high-speed logic, switching and RF applications.