Pulse quenching based radiation-hardened by design technique for analog single-event transient mitigation on an operational amplifier in 28 nm bulk CMOS process

摘要

In nanometer bulk CMOS processes, multi-node charge collection induced by a heavy-ion strike is prevalent. Pulse quenching caused by charge sharing between the struck node (termed as active device) and the following gate (termed as passive device) has been widely studied in digital circuits. This paper firstly demonstrates that the pulse quenching effect also exists between the adjacent stages of analog circuits and can be used to mitigate analog single-event transient (ASET) perturbation. Contrary to digital circuits, whose propagated SET is minimized with the charge collected by passive device maximized, simulation results indicate that there is an optimal spacing between the active and passive devices in analog circuits. When the spacing is too close, the SET induced by the hit node is efficiently mitigated by pulse quenching effect, but the disturbance caused by the charge sharing collection in passive device becomes dominant. Simulation results show that pulse quenching effect has a dual role in ASET mitigation. This paper provides innovative guidance to the radiation-hardening design for analog circuits.