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Analysis and optimization of read/write reliability for 12F~2 cross-point ultra-fast phase change memory

机译:12F〜2交叉点超快速相变存储器的读写可靠性分析和优化

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摘要

Phase change memory (PCM) device using a diode as selector exhibits a high level of integration based on 40 nm process, but it still has some reliability problems, such as read disturbance and writing performance. In this paper, we test and improve the read/write reliability of one diode and one resistor (1D1R) structure cell in array with cell size of 12F(2) (0.16 mu m x 0.12 mu m). The 1D1R device has good performance with ultra-high speed (20 ns) and low programming voltage (3.3 V). The cell programmed by current pulse has a better performance than that of voltage operation in amorphous state with respect to read disturb immunity. The ratio of reset/set resistance can be improved by choosing appropriate parameter of write operation. In addition, the endurance characteristics of the devices are investigated. The optimization in read/write operation guarantee that 1D1R device can satisfy the requirements for the high-speed and high-density applications.
机译:使用二极管作为选择器的相变存储(PCM)器件在40 nm工艺的基础上具有很高的集成度,但仍存在一些可靠性问题,例如读取干扰和写入性能。在本文中,我们测试并提高了单元尺寸为12F(2)(0.16μmx 0.12μm)的阵列中的一个二极管和一个电阻器(1D1R)结构单元的读写可靠性。 1D1R器件具有超高速(20 ns)和低编程电压(3.3 V)的良好性能。就读取干扰抗扰性而言,由电流脉冲编程的单元比在非晶态下的电压操作具有更好的性能。通过选择适当的写入操作参数,可以提高复位/设置电阻的比率。此外,还研究了设备的耐用性。读/写操作的优化保证了1D1R器件可以满足高速和高密度应用的要求。

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