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New Hope for Ultralow-k Integration

机译:Ultralow-k集成的新希望

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The semiconductor industry is keen to reduce RC time delays, and one of the most effective ways to do that is to move to dielectrics with lower dielectric constants. SiO_2 has a k value of 4.1, fluoricated silicate glass has a k value of 3.1 and newer carbon-doped oxides have a k value of 2.9-3.0. Most 65 nm interconnect technologies announced to date employ carbon-doped oxides, but there is a huge perform- ance benefit in going to even lower k values. The International Technology Roadmap for Semiconductors (ITRS) has a target for effective k values (k_(eff)) of 2.3-2.6 for the 45 nm node, 2.0-2.4 for the 32 nm node and < 2.0 for the 22 nm node (k_(eff) is defined as the k value after the materials are integrated/processed). The lowest k value achievable is 1.0, which is that of air.
机译:半导体行业渴望减少RC时间延迟,而最有效的方法之一就是转向具有较低介电常数的电介质。 SiO_2的k值为4.1,氟化硅玻璃的k值为3.1,较新的碳掺杂氧化物的k值为2.9-3.0。迄今为止,已宣布的大多数65 nm互连技术都采用掺杂碳的氧化物,但即使更低的k值也具有巨大的性能优势。国际半导体技术路线图(ITRS)的目标是45纳米节点的有效k值(k_(eff))为2.3-2.6,32纳米节点为2.0-2.4,22纳米节点<2.0 (eff)定义为材料集成/加工后的k值。可达到的最低k值为1.0,即空气的k值。

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