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Coupled Thermo-Mechanical Analysis of 3D ICs Based on an Equivalent Modeling Methodology With Sub-Modeling

机译:基于等效建模方法与子建模的耦合热力学分析

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摘要

The coupled thermo-mechanical field analysis of three-dimensional (3D) stacked integrated circuits (ICs) is evaluated by an efficient and accurate simulation strategy that combines equivalent homogenization modeling methodology and sub-modeling technique. The thermal field is first investigated using the proposed approach, and based on which the structural field is also examined through the calculation of warpage. The utilization of sub-modeling method reveals the local temperature and warpage distributions, which is lost or ignored by the conventional homogenization method. To validate the proposed method, the simulation results of a five-layer stacked integrated circuits are compared against true 3D results of the detailed model, where the maximum deviation for temperature and warpage is as low as 1.62% and 4.89%, respectively, which are greatly improved compared to 8.23% and 7.83% using traditional homogenization method. In addition, the total computation time is reduced by 76.7% in contrast to true 3D finite element analysis (FEA) simulation. Furthermore, the impacts of through-silicon-via (TSV) geometries, underfill and mu-bump parameters on the temperature and warpage distributions are also studied to guide the design of 3D ICs with high performance and reliability.
机译:通过高效均匀化建模方法和子建模技术的有效和准确的仿真策略来评估三维(3D)堆叠集成电路(IC)的耦合热机械场分析。首先使用所提出的方法研究热场,并基于通过计算翘曲来检查结构场。子建模方法的利用揭示了局部温度和翘曲分布,其被传统的均化方法丢失或忽略。为了验证所提出的方法,将五层堆叠集成电路的模拟结果与详细模型的真实3D结果进行比较,其中温度和翘曲的最大偏差分别低至1.62%和4.89%,即使用传统的均质方法,与8.23%和7.83%相比大大提高。此外,与真正的3D有限元分析(FEA)模拟相比,总计算时间减少了76.7%。此外,还研究了通过硅通孔(TSV)几何形状,底部填充和MU凸块参数的影响,以引导具有高性能和可靠性的3D IC的设计。

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